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New IEEE Standard – Active.This standard defines a mechanism for the test of core designs within a system on chip (SoC). This mechanism constitutes a hardware architecture and leverages the core test language (CTL) to facilitate communication between core designers and core integrators.

Product Details

Published:

08/29/2005

ISBN(s):

0738146935, 9780738146935, 9780738146942, 9781504436618

Number of Pages:

117

File Size:

1 file , 1.1 MB

Product Code(s):

STD95335, STDPD95335, STDPL95335