IEC 61691-6 Ed. 2.0 en:2021

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IEC 61691-6:2021(E) Defines IEC 61691-6/IEEE Std 1076.1 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. The language, also informally known as VHDLAMS, is built on the IEC 61691-1-1/IEEE 1076 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.

Product Details

Edition:
2.0
Published:
06/08/2021
Number of Pages:
671
File Size:
1 file , 9.3 MB